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TSI721

RapidIO Bridge

Datasheet

Product Details

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  • x4 PCIe V2.1 to x4 S-RIO V2.1
  • Single port: x4, x2 or x1 support
  • 1.25, 2.5, 3.125 and 5 Gbaud support
  • Multiple DMA and Messaging channels/engines each capable of supporting full 20 Gbaud I/O
  • 8Kbyte packet buffering per DMA and Messaging Channel
  • 20 Baud line rate performance for 64 byte or larger packets, max TLP payload 256 bytes, max block DMA 64 Mbyte
  • PCI Express non-transparent bridging for transaction mapping
  • Lane reversal
  • Automatic Polarity inversion for PCI Express
  • Typical power 2W
  • Reach Support: 60 cm over 2 connectors
  • 100, 125, 156.25 MHz S-RIO and PCIe Endpoint compatible clocking options
  • JTAG 1149.1 and 1149.6
  • 13x13 mm FCBGA
  • Industrial and Commercial options

The Tsi721 converts from PCIe to RapidIO and vice versa and provides full line rate bridging at 20 Gbaud. Using the Tsi721 designers can develop heterogeneous systems that leverage the peer to peer networking performance of RapidIO while at the same time using multiprocessor clusters that may only be PCIe enabled. Using the Tsi721, applications that require large amounts of data transferred efficiently without processor involvement can be executed using the full line rate block DMA+Messaging engines of the Tsi721.

Learn more: IDT RapidIO Development Systems

Design & Development (Boards and Kit)

Board Image

PCIe2 to S-RIO2 Evaluation Board

The IDT Tsi721-16GEBI  Evaluation Board is a prototyping platform that leverage’s IDT’s Tsi721 PCIe®  to RapidIO® Gen2 bridge as well as the CPS-1432 RapidIO Gen2 switch, allowing any PCIe processor to communicate to an S-RIO network. The Tsi721-16GEBI Evaluation board has a variety of interfaces that allows customers to interface DSPs, Microprocessors, and FPGAs to IDT switches, and also allows for x86 processors to interface to an S- RIO network through the Tsi721 bridge. Interfaces include AMCs, SMAs, InfiniBand/CX4 and SFP+ connectors. This allows customers to implement most network configurations that represent their production hardware in a logically equivalent manner. By doing so, systems firmware and software engineers can start implementing their code before production hardware is available thereby accelerating development cycles and time to market. 

The Tsi721-16GEBI evaluation board can network together multiple processors in individual PCs. Each PC is populated with a Tsi721 evaluation board. Each evaluation board is networked together over S-RIO, allowing for a cluster of PCIe enabled x86 processors over S-RIO.

The Tsi721-16GEBI evaluation board comes equipped with RapidFET JTAG, a software tool that can configure IDT switches and bridges out of band via the JTAG interface on the board, making access to registers simple via a user friendly Graphical User Interface.

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